1. Ingeniería

 固定
可変電流制限付き
パワー・スイッチ
NCP380量負荷短絡発生
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UDFN6
CASE 517AB
TSOP−5
CASE 483
TSOP−6
CASE 318G
MARKING DIAGRAMS
1
2
3
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G
6
5
4
UDFN6
5
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= Specific Device Code
=Assembly Location
= Date Code
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 20 of this data sheet.
代表的アプリケーション
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© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 14
1
Publication Order Number:
NCP380JP/D
NCP380, NCV380
USB
DATA
USB INPUT
5V
OUT
IN
Rfault
100 kW
D+
D−
VBUS
GND
1 mF
120 mF
USB
Port
NCP380
FLAG
FLAG
EN
ILIM*
EN
Rlim
GND
*For Adjustable Version Only.
Figure 1. Typical Application Circuit
OUT 1
ILIM* 2
FLAG
PAD1
3
6 IN
OUT
1
5 GND
GND
2
FLAG
3
4 EN
5
IN
4
EN
TSOP−5
UDFN6
(Top view)
IN
1
6
OUT
GND
2
5
ILIM*
EN
3
4
FLAG
TSOP−6
*For adjustable version only, otherwise not connected.
Figure 2. Pin Connections
Table 1. PIN FUNCTION DESCRIPTION
Pin Name
Type
Description
EN
INPUT
GND
POWER
Ground connection;
IN
POWER
Power-switch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND as close as possible to the IC.
FLAG
OUTPUT
Active-low open-drain output, asserted during overcurrent, overtemperature or reverse-voltage conditions.
Connect a 10 kW or greater resistor pull-up, otherwise leave unconnected.
OUT
OUTPUT
Power-switch output; connect a 1 mF ceramic capacitor from OUT to GND as close as possible to the IC
is recommended. A 1 mF or greater ceramic capacitor from OUT to GND must be connected if the USB
requirement (i.e.120 mF capacitor minimum) is not met.
ILIM*
INPUT
PAD1**
THERMAL
Enable input, logic low/high (i.e. EN or EN) turns on power switch
External resistor used to set current-limit threshold; recommended 5 kW < RILIM < 250 kW.
Exposed Thermal Pad: Must be soldered to PCB Ground plane
*(For adjustable version only, otherwise not connected.
**For DFN version only.
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2
NCP380, NCV380
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN , VOUT
−7.0 to +7.0
V
VEN, VILIM, VFLAG, VIN, VOUT
−0.3 to +7.0
V
ISINK
1
mA
From IN to OUT Pins: Input/Output (Note 1)
IN, OUT, EN, ILIM, FLAG, Pins: Input/Output (Note 1)
FLAG Sink Current
ILIM Source Current
ILIM
1
mA
ESD Withstand Voltage (IEC 61000−4−2)
(Output Only, when Bypassed with 1.0 mF Capacitor Minimum)
ESD IEC
15 Air, 8 Contact
kV
Human Body Model (HBM) ESD Rating (Note 2)
ESD HBM
2,000
V
Machine Model (MM) ESD Rating (Notes 2 and 3)
ESD MM
200
V
Latch-up Protection (Note 4)
Pins IN, OUT, EN, ILIM, FLAG
LU
mA
Maximum Junction Temperature Range (Note 6)
TJ
−40 to +TSD
°C
Storage Temperature Range
TSTG
−40 to +150
°C
Moisture Sensitivity (Note 5)
MSL
Level 1
100
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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1. According to JEDEC standard JESD22−A108.
2. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115 for all pins.
3. Except EN pin, 150 V.
4. Latch up Current Maximum Rating: ±100 mA per JEDEC standard: JESD78 class II.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
6. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
Table 3. OPERATING CONDITIONS
Symbol
Parameter
VIN
Operational Power Supply
VEN
Enable Voltage
Conditions
Min
Typ
Max
Unit
2.5
−
5.5
V
0
−
5.5
TA
Ambient Temperature Range
−40
25
+85
TJ
°C
Junction Temperature Range
−40
25
+125
°C
RILIM
Resistor from ILIM to GND Pin
5.0
−
250
kW
ISINK
FLAG Sink Current
CIN
COUT
Decoupling Output Capacitor
RqJA
Thermal Resistance Junction-to-Air
IOUT
PD
−
−
1.0
mA
1.0
−
−
mF
USB Port per Hub
120
−
−
mF
UDFN−6 Package (Notes 7 and 8)
−
120
−
°C/W
TSOP−5 Package (Notes 7 and 8)
−
305
−
°C/W
TSOP−6 Package (Notes 7 and 8)
−
280
−
°C/W
UDFN−6 Package
−
−
2.1
A
TSOP−5, TSOP−6 Package
−
−
1.0
A
Decoupling Input Capacitor
Maximum DC Current
Power Dissipation Rating (Note 9)
TA v 25°C
TA = 85°C
UDFN−6 Package
−
830
−
mW
TSOP−5 Package
−
325
−
mW
TSOP−6 Package
−
350
−
mW
UDFN−6 Package
−
325
−
mW
TSOP−5 Package
−
130
−
mW
TSOP−6 Package
−
145
−
mW
7. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
8. The RqJA is dependent of the PCB heat dissipation. Board used to drive this data was a 2” × 2” NCP380EVB board. It is a 2 layers board
with 2-once copper traces on top and bottom of the board. Exposed pad is connected to ground plane for UDFN−6 version only.
9. The maximum power dissipation (PD) is given by the following formula:
T JMAX * T A
PD +
R qJA
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3
NCP380, NCV380
Table 4. ELECTRICAL CHARACTERISTICS
(Min & Max Limits apply for TA between −40°C to +85°C and TJ up to +125°C for VIN between 2.5 V to 5.5 V (Unless otherwise noted).
Typical values are referenced to TA = +25°C and VIN = 5 V.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
mW
POWER SWITCH
RDS(on)
Static Drain-source On-state
Resistance
DFN Package
TSOP Package
TR
Output Rise Time
TF
Output Fall Time
VIN = 5 V
–40°C < TJ < 125°C
−
55
75
2.5 V < VIN < 5.5 V
–40°C < TJ < 125°C
−
−
110
VIN = 5 V
–40°C < TJ < 125°C
−
70
95
2.5 V < VIN < 5.5 V
–40°C < TJ < 125°C
−
−
135
VIN = 5 V
CLOAD = 1 mF,
RLOAD = 100 W (Note 10)
0.3
1.0
1.5
VIN = 2.5 V
0.2
0.65
1.0
VIN = 5 V
0.1
−
0.5
VIN = 2.5 V
0.1
−
0.5
1.2
−
−
mW
ms
ENABLE INPUT EN OR EN
VIH
High-level Input Voltage
V
VIL
Low-level Input Voltage
−
−
0.4
V
IEN
Input Current
VEN = 0 V, VEN = 5 V
−0.5
−
0.5
mA
TON
Turn On Time
CLOAD = 1 mF, RLOAD = 100 W (Note 11)
2.0
3.0
4.0
ms
TOFF
Turn Off Time
1.0
−
3.0
ms
RILIM = 20 kW (Note 11)
1.02
1.20
1.38
A
RILIM = 40 kW
(Notes 11 and 13)
0.595
0.700
0.805
Fixed 0.5 A (Note 12)
0.5
0.58
0.65
Fixed 1.0 A (Note 12)
1.0
1.15
1.3
Fixed 1.5 A (Note 12)
1.5
1.75
1.9
Fixed 2.0 A (Note 12)
2.0
2.25
2.5
Fixed 2.1 A (Note 12)
2.1
2.25
2.5
CURRENT LIMIT
IOCP
Current-limit Threshold
(Maximum DC Output Current
IOUT Delivered to Load)
VIN = 5 V
A
TDET
Response Time to Short Circuit
−
2.0
−
ms
TREG
Regulation Time
1.8
3.0
4.0
ms
TOCP
Overcurrent Protection Time
14
20
26
ms
−
100
−
mV
4.0
6.0
9.0
ms
7.0
10
15
ms
VIN = 5 V
REVERSE-VOLTAGE PROTECTION
VREV
Reverse-voltage Comparator
Trip Point (VOUT – VIN)
TREV
Time from Reverse-voltage
Condition to MOSFET Switch Off
& FLAG Low
TRREV
Re-arming Time
VIN = 5 V
UNDERVOLTAGE LOCKOUT
VUVLO
IN Pin Low-level Input Voltage
VIN Rising
2.0
2.3
2.4
V
VHYST
IN Pin Hysteresis
TJ = 25°C
25
−
60
mV
TRUVLO
Re-arming Time
7.0
10
15
ms
−
1.0
2.1
mA
−
−
−
−
−
−
90
80
70
−
−
1.0
SUPPLY CURRENT
IINOFF
Low-level Output Supply Current
IINON
High-level Output Supply
Current
IREV
Reverse Leakage Current
VIN = 5 V, No Load on OUT, Device OFF
VEN = 0 V or VEN = 5 V
VIN = 5 V, Device Enable
2 A and 2.1 A Versions
1 A and 1.5 A Current Versions
0.5 A Current Version
VOUT = 5 V, VIN = 0 V
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4
TJ = 25°C
mA
mA
NCP380, NCV380
Table 4. ELECTRICAL CHARACTERISTICS (continued)
(Min & Max Limits apply for TA between −40°C to +85°C and TJ up to +125°C for VIN between 2.5 V to 5.5 V (Unless otherwise noted).
Typical values are referenced to TA = +25°C and VIN = 5 V.)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
mV
FLAG PIN
FLAG Output Low Voltage
IFLAG = 1 mA
400
ILEAK
Off-state Leakage
VFLAG = 5 V
1.0
mA
TFLG
FLAG Deglitch
FLAG De-assertion Time due to Overcurrent or
Reverse Voltage Condition
4.0
6.0
9.0
ms
TFOCP
FLAG Deglitch
FLAG Assertion due to Overcurrent
6.0
8.0
12
ms
VOL
THERMAL SHUTDOWN
TSD
Thermal Shutdown Threshold
140
°C
TSDOCP
Thermal Regulation Threshold
125
°C
TRSD
Thermal Shutdown Rearming
Threshold
115
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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10. Parameters are guaranteed for CLOAD and RLOAD connected to the OUT pin with respect to the ground, See Figure 3.
11. Adjustable current version, RILIM tolerance ±1%.
12. Fixed current version.
13. Not production test, guaranteed by characterization.
VIN
IN
OUT
1 mF
CLOAD
RLOAD
NCP380
GND
Figure 3. Test Configuration
50%
VEN
TR
TF
VEN
TOFF
VOUT
TON
VOUT
90%
10%
90%
10%
Figure 4. Voltage Waveform
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5
10%
NCP380, NCV380
BLOCK DIAGRAM
Blocking Control
IN
ILIM*
OUT
Current
Limiter
Vref
TSD
Gate Driver
UVLO
Osc
GND
Flag
/FLAG
EN
EN Block
Control Logic and Timer
*For adjustable version only, otherwise not connected.
Figure 5. Block Diagram
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6
NCP380, NCV380
Ton + TR
Figure 6. Ton Delay and Trise Time
Toff + Tfall
Figure 7. Toff Delay and Tfall
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7
NCP380, NCV380
Figure 8. Turn On a Short
TSD
Warning
Treg
TOCP
Figure 9. 2 W Short on Output. Complete Regulation Sequence
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8
NCP380, NCV380
TFOCP
TSD Warning
VIN
VOUT
IIN
/FLAG
Figure 10. OCP Regulation and TSD Warning Event
TOCP
Treg
Figure 11. Timer Regulation Sequence During 2 W Overload
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9
NCP380, NCV380
Figure 12. Direct Short on OUT Pin
Figure 13. From Timer Regulation to Load Removal Sequence
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10
NCP380, NCV380
TFOCP
VOUT
IOUT
/FLAG
Figure 14. From No Load to Direct Short Circuit
VREV
VOUT
VIN
TFREV
/FLAG
Figure 15. Reverse Voltage Detection
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11
NCP380, NCV380
T RREV
Figure 16. Reverse Voltage Removal
2.4
2.38
2.36
UVLO (V)
2.34
2.32
2.3
2.28
2.26
2.24
UVLO vs. Temperature
2.22
UVLO − hysteresis vs.
Temperature
2.2
−50
0
50
100
150
Temperature (°C)
Figure 17. Undervoltage Threshold (Falling) and Hysteresis
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12
NCP380, NCV380
Low−Level Output Supply Current vs Vin
−40°C
25°C
85°C
125°C
2.0
1.8
1.6
IINOFF (mA)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.4
2.9
3.4
3.9
4.4
4.9
5.4
Vin(V)
Figure 18. Standby Current vs Vin
High−Level Output Supply Current vs Vin
−40°C
25°C
85°C
125°C
100
90
80
70
IINON (mA)
60
50
40
30
20
10
0
2.4
2.9
3.4
3.9
4.4
Vin(V)
Figure 19. Quiescent Current vs Vin
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13
4.9
5.4
NCP380, NCV380
TSOP Package
100
95
RDS(on) vs. Temperature
90
85
75
70
65
60
55
50
45
40
−50 −40 −30 −20 −10
0
10
20
30
40
50
60
70
80
90
100 110 120 130 140
Temperature (°C)
Figure 20. RDS(on) vs Temperature, TSOP Package
mDFN Package
100
95
90
RDS(on) vs. Temperature
85
RDS(on) (mW)
RDS(on) (mW)
80
80
75
70
65
60
55
50
45
40
−50 −40 −30 −20 −10
0
10
20
30
40
50
60
70
80
90 100 110 120 130 140
Temperature (°C)
Figure 21. RDS(on) vs Temperature, mDFN Package
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14
NCP380, NCV380
機能説明
概要
VOUT
Thermal
Regulation
Threshold
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Figure 24. Short circuit
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Timer
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IOUT
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15
NCP380, NCV380
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IOUT
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(eq. 3)
= v9部wx(°C)
= !)&fEF(°C/W)
= ×Gwx(°C)
;:<=#&Ï費電1œ&関ޝž
負荷“”.ƒ<6電[降TVIN−VOUT-考ß
6L計算#P/$
P D + ǒV IN * R LOAD
%%#
PD
VIN
RLOAD
IOCP
I OCPǓ
I OCP
(eq. 4)
= Ï費電1(W)
= \1電[(V)
= 負荷EF(W)
= 01;:<電2(A)
www.onsemi.jp
16
NCP380, NCV380
Table 5. RESISTOR SELECTION FOR ADJUSTABLE CURRENT LIMIT VERSION
Min Current
Limit Value
(A)
Theoric Resistor Value
(kW)
Selected Resistor Value
(kW)
1% or 0.1%
Typical OCP Target Value
(A)
Maximum
Current Value
(A)
0.5
44.2
44.2
0.59
0.67
0.6
37.5
37.4
0.71
0.81
0.7
32.2
31.6
0.825
0.95
0.8
27.7
27.4
0.94
1.08
0.9
24.0
23.7
1.06
1.22
1.0
21.0
21
1.18
1.35
1.1
18.5
18.2
1.3
1.49
1.2
16.6
16.5
1.41
1.62
1.3
14.6
14.3
1.53
1.76
1.4
13.0
13
1.65
1.9
1.5
11.4
11.3
1.78
2.05
1.6
10.4
10.2
1.88
2.17
1.7
9.2
9.09
2.01
2.31
1.8
8.3
8.25
2.12
2.438
1.9
7.4
7.32
2.23
2.56
2.0
6.5
6.49
2.36
2.7
2.1
5.6
5.49
2.48
2.85
表&“T限電2›”過電2起m.
Ÿ
状g#
&idíˆ給6DC電2-表.
/$
ILIM 5 ) 45.256
ILIM 4 * 155.25
ILIM 3 ) 274.39
ILIM 2 * 267.6
ILIM ) 134.21
Rlim Versus OCP Average
RLIM (kW)
Rlim + −5.2959
2番目&行ëT&7¬ð_¬îz電2b
ñ!j-ò6_&EF理論›#：
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
RLIM vs. OCP Average
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
Current Limit (A)
Figure 25. RLIM Curve vs. Current Limit
www.onsemi.jp
17
2.4
2.6
2.8
(eq. 5)
NCP380, NCV380
HI&9Aµ.EF選
O6L過電2P
›&許›ëT&
.ð_¬/：
IOCP min + 1.6915129 * 0.0330328
) 0.0000009
Rlim ) 0.0011207(Rlim * 22.375) 2 * 0.0000451
(Rlim * 22.375) 3 )
(eq. 6)
(Rlim * 22.375) 4
IOCP max + 2.2885175 * 0.0446914
) 0.0000012
Rlim ) 0.0015163(Rlim * 22.375) 2 * 0.000061
(Rlim * 22.375) 3 )
(eq. 7)
(Rlim * 22.375) 3 )
(eq. 8)
(Rlim * 22.375) 4
IOCPtyp + 1.9900152 * 0.0388621
) 0.0000011
Rlim ) 0.0013185(Rlim * 22.375) 2 * 0.0000531
(Rlim * 22.375) 4
ÚóîzÚ電2ÕeëT&W‰r&通
?LŸ?/：
3.0
2.8
IOCP min vs. RLIM
2.6
IOCP vs. RLIM
2.4
IOCP max vs. RLIM
2.2
2.0
ILIM (A)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35 37
39
41
43 45
47
RLIM (kW)
Figure 26. Current Threshold vs. Rlim Resistor
PCBに関する推奨事項
2°理由7¬EF›6 kW−47 kW&範G-考ß
6%L-èé/$
o
EF›&S電2許›高
電24C,
ôR¾¬/$M部電1õöº能VB.w
xV6Û響-考ß6LÚ2.4 Aîz-mDFN
! ) 設 : 6 % L 0 ã / $TSOP6
()関.製÷:電23U=
\6øt,*!jp=\6K能
º­Æ6åÚ#1.2 Aè雟?/$
ùú#­15%&精x-維û
S高
EF›#50 kW/#用0ã/$高
›&89
電2P
›500 mAV?­o¶Ÿ?/$à&å
%&89精x落Q6%LÆ?/$
NCP380Ú:ü2 A&PMOSFET-集積.
6
_PCB'I,,-遵ý.a7
¬&f-適>逃…要Æ?/$…要“”
.fþÿ-高_6_UDFN6 PAD1-W‰
4v続.¶·
$%&!…ず
W‰4v続/$PCB面積-増
%L#!)&RqJA-oÐ#P/²
A?Ï費電1増/$
www.onsemi.jp
18
www.onsemi.jp
19
Figure 27. USB Host Typical Application
USB Port
GND
D−
D+
VBUS
OUT
2
3
USB
Transceiver
GND
1
IN
LDO 3.3 V
10 mF
GND
D−
10
GND
3
2
1
EN
DATA_OUT[x:0]
DATA_IN[x:0]
GND
CRTL_OUT[x:0]
SYS
CRTL_IN[x:0]
VCC
4
5
6
USB Host
Controller
/FLAG
ILIM
OUT
NCP380
GND
IN
STATUS
EN
GPM21BR61C106KE15L
VCC
12
VBUS(sense) CRTL[x:0]
11
DATA[x:0]
D+
1
4.7 mF
Upstream USB Port
3
4
2
5
IN
Power Supply
1
10
Downstream USB Port
VCC
5
12
CRTL[x:0] VBUS(sense)
11
2
DATA[x:0]
D+
3
D−
4
GND
GND
USB
Transceiver
SYSTEM
GPM31CR60J107ME39L
100 mF
USB Port
GND
D−
D+
VBUS
NCP380, NCV380
NCP380, NCV380
Table 6. ORDERING INFORMATION
Device
Marking
Active
Enable
Level
Over
Current
Limit
Evaluation Board
UL
Listed
CB
Scheme
NCP380LSNAJAAT1G
AAC
Adj.
NCP380LSNAJAGEVB
Y
Y
NCP380LSN05AAT1G
AC5
0.5 A
NCP380LSN05AGEVB
Y
Y
NCP380LSN10AAT1G
AC6
1.0 A
NCP380LSN10AGEVB
Y
Y
NCP380LMUAJAATBG
AA
Adj.
NCP380LMUAJAGEVB
Y
Y
NCV380LMUAJAATBG*
AN
Adj.
NCP380LMUAJAGEVB
Y
Y
NCP380LMU05AATBG
AE
0.5 A
NCP380LMU05AGEVB
Y
Y
NCP380LMU10AATBG
AF
1.0 A
NCP380LMU10AGEVB
Y
Y
NCP380LMU15AATBG
AG
1.5 A
NCP380LMU15AGEVB
Y
Y
NCV380LMU15AATBG*
AQ
1.5 A
NCP380LMU15AGEVB
Y
Y
NCP380LMU20AATBG
AL
2.0 A
NCP380LMU20AGEVB
Y
Y
NCP380HSNAJAAT1G
AAD
Adj.
NCP380HSNAJAGEVB
Y
Y
NCP380HSN05AAT1G
AC7
0.5 A
NCP380HSN05AGEVB
Y
Y
NCP380HSN10AAT1G
ADA
1.0 A
NCP380HSN10AGEVB
Y
Y
NCP380HMUAJAATBG
AC
Adj.
NCP380HMUAJAGEVB
Y
Y
Low
NCV380HMUAJAATBG*
AP
Adj.
NCP380HMUAJAGEVB
Y
Y
NCP380HMU05AATBG
AH
0.5 A
NCP380HMU05AGEVB
Y
Y
NCP380HMU10AATBG
AJ
1.0 A
NCP380HMU10AGEVB
Y
Y
NCP380HMU15AATBG
AK
1.5 A
NCP380HMU15AGEVB
Y
Y
NCP380HMU20AATBG
AM
2.0 A
NCP380HMU20AGEVB
Y
Y
NCP380HMU21AATBG
AU
2.1 A
NCP380HMU21AGEVB
Y
Y
High
Package
Shipping†
TSOP−6
(Pb−Free)
TSOP−5
(Pb−Free)
UDFN6
(Pb−Free)
TSOP−6
(Pb−Free)
3,000
Tape / Reel
TSOP−5
(Pb−Free)
UDFN6
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
www.onsemi.jp
20
NCP380, NCV380
PACKAGE DIMENSIONS
UDFN6 2x2, 0.65P
CASE 517AB
ISSUE C
! ! "
!
# ! # ! ! A B
D
NOTE 5
PIN ONE
REFERENCE
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
END VIEW
TOP VIEW
A3
A
6X
& A1
NOTE 4
C
SIDE VIEW
DETAIL A
D2
1
ÉÉÉ
ÇÇÇ
ÇÇÇ
EXPOSED Cu
DETAIL B
SEATING
PLANE
L
MOLD CMPD
A1
MILLIMETERS
MIN
MAX
$%
%
$
%
&
'%
(((
DETAIL B
ALTERNATE
CONSTRUCTIONS
L
L
3
ÇÇ
ÉÉ
A3
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
L1
DETAIL A
E2
ALTERNATE TERMINAL
CONSTRUCTIONS
6
4
e
BOTTOM VIEW
6X
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
1.70
6X
0.47
b
2.30
0.95
1
0.65
PITCH
6X
0.40
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.jp
21
NCP380, NCV380
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE K
NOTE 5
2X
D 5X
M
2X
B
5
1
4
2
S
3
K
B
DETAIL Z
G
A
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
DETAIL Z
J
C
H
SIDE VIEW
C
SEATING
PLANE
END VIEW
MILLIMETERS
MIN
MAX
3.00 BSC
1.50 BSC
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
0_
10 _
2.50
3.00
SOLDERING FOOTPRINT*
0.95
0.037
1.9
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.jp
22
NCP380, NCV380
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
D
H
6
E1
5
ÉÉÉ
1
NOTE 5
2
4
L2
GAUGE
PLANE
E
3
L
M
b
A1
SEATING
PLANE
DIM
A
A1
b
c
D
E
E1
e
L
L2
M
DETAIL Z
e
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
A
c
DETAIL Z
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.38
0.50
0.18
0.26
3.00
3.10
2.75
3.00
1.50
1.70
0.95
1.05
0.40
0.60
0.25 BSC
10°
−
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
6X
3.20
0.95
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.jp
23
NCP380, NCV380
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized
for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the
SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application,
Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was
negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is
not for resale in any manner.
()
ON Semiconductor8ZON([\Semiconductor Components Industries, LLC (SCILLC) ]P^_(`ab(cd8Ze"*f(dghijklN#$SCILLC?m
klnUopqrs(tuvw)xf(yMz{oJ#o|}{P"#$SCILLC(:;e?m(~J€‚1QƒS(„r…'†‡1*ˆ
h"#$www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC‰Š0PN‹ŒAE(:;(ŽV%x!"#$SCILLC1…0?(MN(:;(~,
‚1Q}‘PQg'’"*g“”(:;g1Q•–(—˜™…'23*š›?œMžMŸ M0/¡JPQ1…0š›¢£%xN¤"¥
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.!"#$©lªM«<=>¶·#¸Q(TU<=>†™0¬­®q¯„—3Qg“”(¹º»¼½g1Q¾¿À‘F&°gÁ1Â
P"#$SCILLC_(?mo˜_(f(o|(S1…0=Ä¢mÄP"¥¦$SCILLC:;ÅÆÇ(ÈÉMÊːMx#qGÌÇ(™2ÍÎϐ
MxP*¬­®q¯„"*SCILLC:;(ÐÑ,°ÒÓÔ(ÕÖ×%!Y°0¬­®q¯„0ØÇ(™ÙÚP*ÛÜF&Qg'’"*%&'
™J€xPQg!"¥¦$g“”%(°0ÙÚF&*¢(N01m¨F&Q101¬­®q¯„SCILLC:;ÝÞ"*™P*+,*xSCILLC
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Q(rÌé/¡³ég°Zêëìí0Øg“”(š›g1QîïgÁ11*P"#$"*SCILLCx_(ðñòuñ`abáçabóôõJ
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Q¢ÿ販#%xN¤"¥¦$
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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24
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For additional information, please contact your local
Sales Representative
NCP380JP/D